From HBM to CXL: Samsung, SK Hynix, Micron Compete in the CXL Track. Will CXL Be the Next Big Thing in the AI Data Center Era?

TradingKey - According to a report by the South Korean media outlet The Korea Economic Daily, Samsung recently disclosed the latest developments in its CXL memory system "Pangea v2".

CXL, or Compute Express Link, is considered another potential "killer app" for Samsung following HBM. Amid the sustained growth in demand for AI computing power and memory chips, CXL is moving from a niche technology into the spotlight and could become the next major trend in the memory sector.

What is HBM? What is CXL?

HBM, or High Bandwidth Memory, which is currently in short supply in the global market, refers to high-bandwidth memory. Bandwidth refers to the total amount of data that can be transmitted per unit of time. Micron (MU) , SK Hynix, and Samsung are currently the leading mass-production suppliers of HBM globally. Nvidia's (NVDA) H100/B200 chips are highly dependent on this technology.

As of now, the latest technical standard to enter mass production is HBM4, the sixth generation of high-bandwidth memory. HBM4 has become standard for Nvidia's Vera Rubin platform and AMD's MI450. The more advanced and efficient HBM4E has not yet entered mass production but has already appeared on the roadmaps of major manufacturers.

HBM is a hardware architecture that increases bandwidth by 3D-stacking DRAM chips and packaging them directly next to the processor. Its technical advantages include the close proximity between memory and the processor, resulting in extremely short data transmission paths; the core TSV (Through-Silicon Via) technology used in 3D stacking is equivalent to creating thousands of vertical electrical signal paths in the DRAM chips, allowing electrical signals to penetrate all layers vertically.

Unlike HBM, which is a hardware architecture, CXL is an interconnect protocol. CXL is used to connect CPUs and external devices, aiming to resolve communication bottlenecks while pursuing flexibility and scalability. However, the similarity lies in both technologies being designed to address the "memory wall" problem—the issue where chips cannot access data fast enough, forcing users to endure longer response times.

Compared to HBM, CXL's advantage lies in large memory capacity. While its data transmission speed is lower than HBM's, CXL can bypass server slot limitations to provide terabyte-level memory capacity and enable memory sharing among multiple processors, known as "memory pooling." Compared to HBM, CXL is lower in cost and more easily scalable, making it a more cost-effective large-scale memory solution.

In the future, HBM and CXL will serve AI servers together: high-bandwidth HBM will be used for core model computations, while CXL will provide high-capacity memory, serving as a memory pool to support massive data access.

CXL in the Data Center Era: Ending the "Memory Wall" Problem

The reason future data centers require CXL lies precisely in its features: it enables external memory expansion and memory sharing through memory pooling, reducing costs while resolving data transfer speed bottlenecks.

Traditional server memory slots are connected directly to the CPU; when memory runs low, the only option is to purchase another server. However, with CXL technology, memory can be connected externally via PCIe interfaces like hard drives, breaking through the physical limitations of motherboard slots. Theoretically, as long as a server has enough PCIe slots, memory capacity can be increased indefinitely.

On the other hand, different servers in traditional data centers cannot share memory due to physical isolation. However, CXL 2.0 introduces memory pooling, where all memory is placed in a single pool; the CXL switch can then allocate memory in real-time to whichever server needs more, improving resource utilization. Against the backdrop of continuously rising memory prices, this move undoubtedly significantly reduces costs.

Regarding data transfer speeds, communication between accelerators in traditional data centers uses standard PCIe protocols, which require data to be encapsulated into "packets" and processed through a software stack, resulting in slow speeds and high latency. But with CXL, the memory coherency based on the CXL protocol allows accelerators to perform hardware-level read and write access directly to pooled resources, greatly shortening the data transfer path.

Although the application of CXL will bring a significant leap in data center technology, its large-scale commercialization still faces critical constraints, as the technology requires CPUs, GPUs, memory, and networking equipment within the data center to all support the same standard. The complexity of cross-industry ecosystem coordination for CXL remains the most difficult hurdle on its path to widespread adoption.

Samsung Pangea v2: The Highest Standard of the CXL 2.0 Era

According to The Korea Economic Daily, Samsung's CXL memory system "Pangea v2" has demonstrated exceptional performance, with data transfer capabilities 10.2 times higher than traditional RDMA solutions and a bottleneck reduction of up to 96%, marking it as a significant technological breakthrough in the CXL field.

The system is based on Intel (INTC) , Nvidia, and other companies' CXL 2.0 standard jointly launched in 2020, which requires the integration of 22 CXL DRAM modules (CMM-D, or CXL Memory Module-DRAM, meaning CXL-based DRAM memory modules) into a single shared memory pool, supporting multi-server access to a maximum memory capacity of 5.5TB.

Samsung's "Pangea v2" represents the pinnacle of systems in the current CXL 2.0 era; however, given the rapid pace of technological iteration in the CXL sector, the significance of v2 lies in setting a benchmark for CXL 2.0 technology rather than serving as an eternal leader.

The CXL standard has now reached version 3.2, and Samsung has announced plans to release "Pangea v3" based on the latest specifications within 2026. v3 is expected to introduce more robust optical communication support and higher single-port bandwidth, with performance projected to surpass that of v2.

CXL Landscape: The Collective Pivot of SK Hynix, Micron, Intel, and NVIDIA

In addition to Samsung, its competitors SK Hynix and Micron have both launched mature products in the CXL space. This March, SK Hynix showcased its CMM-DDR5 CXL memory module at the CFMS 2026 Global Flash Summit, having already introduced HMSDK, a software suite developed for CXL operations, even earlier. Micron also launched the CZ120 memory expansion module in 2023.

Currently, tech companies that have launched mature products remain in the minority. Beyond the aforementioned companies, several tech giants have introduced CXL-supported products. For instance, Intel’s 5th Gen Xeon and its latest Granite Rapids processors fully support CXL 2.0, with certain features supporting CXL 3.0. AMD (AMD) 's EPYC Genoa and Turin series have entered mass production, both supporting CXL memory expansion.

Furthermore, some tech companies are developing CXL-compatible chips. NVIDIA plans to support the CXL 3.1 standard in its Vera CPU, slated for release later this year, a move viewed by the industry as the most significant real-world test for CXL to date.

According to The Information, Google (GOOG) (GOOGL) has begun deploying CXL in its data centers and is starting to install controllers to manage data traffic between CPUs and large external memory pools.

Storage Sector Shifts Toward CXL: From Cyclical to Growth Stocks?

Traditionally, the core of the memory industry has been DRAM dies; for example, HBM involves 3D stacking of DRAM chips. Competition among the three memory giants—Samsung, SK Hynix, and Micron—in this field centers on who can stack more layers.

CXL, however, has opened up an entirely new frontier, where competition hinges on hardware-software synergy: it depends on whose CXL integrates better with processors from Intel, AMD, and NVIDIA, whose CXL controllers offer lower latency, and whose management software is more user-friendly. This requires memory companies to possess not only cutting-edge chip technology but also stronger logic chip design capabilities. The emergence of CXL presents an opportunity for a reshuffle in the memory industry and introduces new profit growth engines.

Specifically, CXL bridges the gap between memory (such as DRAM) and storage (such as SSDs), essentially making memory larger and storage faster. For the three memory giants, while HBM previously enjoyed high premiums driven by AI data center demand, their SSD products will be able to command similar premiums once CXL-equipped SSDs capture the mainstream market.

Furthermore, the memory industry will undergo segmentation as CXL enters the mainstream: HBM, which pursues extreme bandwidth, remains at the top of the pyramid due to its cutting-edge technology and low production yields; traditional DDR5, balancing latency and capacity, maintains its established market; and CXL expansion memory will specialize in TB-level ultra-large capacities. This differentiation allows memory manufacturers to specialize in specific products, enhancing synergy across the entire industry chain.

In the past, the R&D model for memory was dictated by processor specifications, leaving the storage industry with relatively little influence in the semiconductor sector. However, as CXL goes mainstream, future data centers may shift from being CPU-centric to a memory-pooling-centric architecture. This will significantly boost the valuations of storage companies, shifting the industry's valuation logic from cyclical stocks to growth stocks.