Why TSMC stock keeps breaking records for a second straight day

Source Cryptopolitan

Taiwan Semiconductor Manufacturing Co. (TSMC)’s stock hit another new all-time high today because investors got two reasons to buy more of the world’s largest chipmaker.

First, Taiwan’s regulator said it plans to relax limits on how much local funds can put into one stock. Second, TSMC is still posting huge profit growth while demand for advanced chips stays strong. Shares surged by 5% on Friday, after the stock had already reached a record on Thursday.

The planned rule change matters because it affects how much money local funds can place into TSMC. Under the revised framework, domestic equity funds and actively managed ETFs focused on Taiwanese stocks will be allowed to put up to 25% of assets into any listed company with a weighting above 10% on the Taiwan Stock Exchange.

The old rule had capped one company at 10% of a portfolio’s net asset value. Since TSMC dominates that market, traders read the proposal as a path for more buying.

Taiwan eases fund rules and gives TSMC another lift

The regulatory news landed after another strong earnings report. Last week, TSMC said first quarter profit jumped 58%, beating estimates as the AI boom kept chip demand high. Net income came in at 572.48 billion new Taiwan dollars for the three months ended in March.

That was the fourth straight quarter of record profit. TSMC is Asia’s most valuable technology company, and its chips are used in products ranging from consumer devices to large data centers.

Customer demand has stayed strong across the market. TSMC continues to supply advanced chips for major customers such as Apple. It also benefits from the rapid growth of AI, where it manufactures advanced processors designed by Nvidia, now its biggest customer.

That keeps TSMC tied to demand in artificial intelligence, high performance computing, and mobile devices, three areas that still need more powerful and more efficient chips.

TSMC broadens chip design work and adds newer node plans

Beyond the stock rally, TSMC also added business and product updates. First, the company and Siemens expanded their partnership to push AI-powered automation further into semiconductor design.

The deal builds on earlier work aimed at expanding automation across electronic design automation, or EDA, workflows. As part of that effort, Siemens will integrate its Fuse EDA AI System, an AI platform built to automate several chip design steps and improve productivity.

The collaboration also covers advanced chip designs, including 3D IC architectures that use TSMC’s 3DFabric technology. Siemens tools are being used for verification, connectivity checks, and thermal analysis.

The two companies are also working on support for TSMC’s 3nm, 2nm, A16, and A14 process technologies. The work also includes silicon photonics and TSMC’s Compact Universal Photonic Engine, or COUPE, backed by Siemens design and verification tools for next-generation chip development.

At TSMC’s 2026 North America Technology Symposium in Santa Clara on April 22, the company introduced A13, its latest advance in its most advanced process technology.

A13 is a direct shrink of A14, which was announced in 2025. It is meant for next-generation AI, HPC, and mobile applications, with more compact and more efficient designs.

TSMC said A13 offers 6% area savings from A14, keeps design rules fully backward compatible with A14, and is scheduled for production in 2029, one year after A14.

At the event, TSMC’s Chairman and CEO Dr. C.C. Wei said customers keep looking to their next product cycle and need a reliable stream of new silicon technologies.

The symposium, held under the theme “Expanding AI with Leadership Silicon,” is the first stop in a global event series and serves as TSMC’s biggest yearly customer gathering.

TSMC also previewed A12, an A14 enhancement with Super Power Rail for backside power delivery in AI and HPC chips, also due in 2029. It also introduced N2U, a new 2nm option due in 2028, with 3% to 4% speed gains or 8% to 10% lower power use, plus 1.02x to 1.03x logic density improvement over N2P.

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Disclaimer: For information purposes only. Past performance is not indicative of future results.
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